The solution of an electric circuit can be seen as a sequence of steps, where each step corresponds to application of a single and well-defined method. Series-parallel reduction or Superposition Theorem are just examples of methods that do not provide the value of a given circuit variable, but rather approaches that need to be combined with other methods in order to reach the final desired solution. It is straightforward to note that the process of applying such step-by-step solutions can be organized in a graph, where nodes represent circuits and edges/connectors represent methods that trasform a circuit into another circuit. This graph is here called the Circuit Solution Tree. A key feature of the iCircuits service is the interactive visualization and modification of the Circuit Solution Tree as the circuit is being solved by selecting the desired methods. This document provides some basic information on how to interpret the various components of a Circuit Solution Tree, namely the nodes, the connectors and in particular the templates associated to each circuit analysis method.
Each node in the Circuit Solution Tree corresponds to a well-defined circuit, equipped with data and problem statements. A given node may correspond to a circuit to be computed or derived, or to the final solution to be computed, in which case it is a placeholder to highlight graphically future operations. Hovering with the mouse over a node displays a tooltip with a minimal explanation. Clicking on a node will display the corresponding circuit in the main page.
Each node is depicted with a border and a fill color. The border color defines whether the corresponding circuit is completely available or still undefined. The fill color defines whether the solution of the corresponding circuit has been computed or is still pending. The table below summarizes the various cases that may occur.
|
Root node This is the first node of the Circuit Solution Tree, which corresponds to the initial problem statement, when solution has not been started yet. As soon as the first solution step is completed, this node will be redefined to become a "Completed node". |
|
Result node This is the last node the Circuit Solution Tree. This node corresponds to the final solution, when the solution has not been computed yet. At the end of the solution process, this node will be redefined to become a "Completed node". |
|
Ready node Any node of the Circuit Solution Tree, for which the solution has not been computed yet, and which is ready for performing one solution step (no dependency on other operations, both circuit and associated data are available). The same graphical notation of the Root node at the beginning of a solution process is used, since a Ready node is the root of the subtree that originates from its solution. |
|
Active node This is the single node of the Circuit Solution Tree that is currently selected for performing an operation. This particular circuit must be processed by some analysis method in order to advance the solution process. |
|
Future node Any node of the Circuit Solution Tree, for which the solution has not been computed yet, and which is NOT ready for performing a solution step. This node will have to be processed in a future step, but either circuit or associated data are NOT yet available. To be considered as a placeholder in the Circuit Solution Tree, for later steps that are expected. The same graphical notation of the Result node is used, since the latter is in fact a Future node (with no children nodes). |
|
Completed node Any node of the Circuit Solution Tree, for which the solution has already been computed. This is to be considered as a pointer to a completed operation, for which initial circuit and corresponding solution are available. |
Each connector corresponds to all steps to be performed by applying a specific method to a circuit node in the tree, in order to obtain another circuit node. Possibly, some methods map a circuit node to several circuit nodes (e.g., superposition) or many circuit nodes to a single circuit node (e.g., when collecting results obtained from superposition). Hovering with the mouse over a connector displays a tooltip with a minimal explanation of the corresponding method. Clicking on a connector will display the solution process resulting from application of the corresponding method.
Each connector is depicted with a line connecting two nodes, with a line color and style. The line color defines whether the corresponding operation has been performed or is still pending. The line style defines whether the corresponding operation is already determined or is still undefined. The table below summarizes the various cases that may occur.
|
Completed path One-to-one connector between two nodes, corresponding to an operation that has already been performed. The source node is completed, the target node can be either completed or ready. |
|
Future path One-to-one connector between two nodes, corresponding to an operation that has not been performed yet but has been decided already. The source node is ready, the target node is future. |
|
Undefined path One-to-one connector between two nodes, corresponding to an operation that has not been defined yet. The source node can be ready or future, the target node is future. |
|
Completed path (splitting) One-to-many connectors between two node sets, corresponding to an operation that splits a node into multiple circuits, to be solved independently. The source node must be in completed state, since the only operation involved in this case is the actual splitting. Individual operations are also marked as completed following the splitting. The target nodes may be in completed or ready state, depending on whether they have been processed by later steps or not. |
|
Future path (collection) Many-to-one connectors between two node sets, corresponding to an operation that collects results from multiple nodes originated by a splitting. The source nodes can be in any state. The target node can be in future state (in which case the connectors are also in future state, since collection of results has not been performed yet) or ready/completed state, in which case also connectors are in completed state. |
Each circuit analysis method involves a number of well-defined operations. Such operations can be formalized as a sequence of individual steps, which once again can be represented in form of a graph. This idea leads to the abstract templates that represent all steps required by a circuit analysis method in the Circuit Solution Tree. Templates are subgraphs of the global Circuit Solution Tree, that are inserted by replacing an undefined connector whenever a given method is selected by the user or by the solution process.
The User has the possibility to select the desired method by clicking on the corresponding button
A special feature of the iCircuits service is the ability to present the User with a list of analysis methods that are applicable to the circuit under processing. Methods that are not appropriate or not applicable (or not yet implemented!) are not listed. Method that have a high priority (i.e. likely to significantly simplify the overall solution process) are highlighted with a green color, whereas methods with a lower priority (i.e. potentially more complicated or requiring more efforts) are highlighted with a red color.
If the User selects the desired method by clicking on the corresponding button, this method will be applied when submitting the request to the iCircuits server. If no selection is performed, the first (leftmost) method will be automatically chosen. Pressing the Run to end button will iteratively apply the first listed (highest priority) method in batch-mode, without User interaction, until the circuit solution is obtained.
The following table lists all (implemented or planned) methods with the corresponding templates, by showing the portion of the Circuit Solution Tree that is involved before and after applying the methods.
|
Initial Configuration This is the default configuration that is initialized when a new problem is generated. Source node is the original circuit, target node is the solution to be computed. The connector is undefined since no method has been chosen yet. |
|
Before
|
After
|
Series-Parallel Reduction This method performs one step of circuit reduction by:
The above steps correspond to the completed edge in the template. Problem statement of the new active circuit is the same as the original circuit. |
Before
|
After
|
Star-Delta Reduction This method performs one step of circuit reduction by:
The above steps correspond to the completed edge in the template. Problem statement of the new active circuit is the same as the original |
Before
|
After
|
Superposition This method applies superposition to evaluate one or more circuit variables. The various steps are:
This template only operates the splitting when invoked, but it initializes all data structures also for those future steps that are known. See the template "Superposition (collect)", which defines and implements the above step 3. |
Before
|
After
|
Superposition (collect) This method collects results of a previous splitting by superposition, evaluates the sum of individual contributions, and presents the result. This template only exists in combination with (following) a "Superposition" template. It is activated when all contributions are available, i.e. when the corresponding nodes are in ready state. |
Before
|
After
|
First-order circuits with DC sources This method is invoked when the problem statement is to solve a I order circuit with DC sources and switches. The solution process involves:
|
Before
|
After
|
Fix state variables (collect) This method starts with a given dynamic circuit and with a set of given values of state variables, and replaces the corresponding dynamic elements with independent sources whose value matches the provided values. This template only exists in combination with (following) other templates, such as "First-order circuits with DC sources" and "State variables". It is activated when all contributions are available, i.e. when the corresponding nodes are in ready state. |
Before
|
After
|
Find Time Constant Consider a generic I order circuit with arbitrary sources and find the time constant. First, compute equivalent resistance seen by the dynamic element with all sources switched off and all switches in their position for \(t>0\). Then, evaluate the time constant and return the result. |
Before
|
After
|
Evaluate time constant (collect) This method starts with a known value of \(R_{eq}\) and a known type/value of dynamic element, and evaluates the time constant of the corresponding I order circuit. This template only exists in combination with (following) the template "Find Time Constant". It is activated when all contributions are available, i.e. when the corresponding nodes are in ready state. |
Before
|
After
|
First-order (collect) This method collects partial results obtained after splitting the solution of a I order circuit with DC sources and switches into initial conditions, steady-state (asymptotic solution), and time constant. This template only exists in combination with (following) a "First-order circuits with DC sources" template. It is activated when all contributions are available, i.e. when the corresponding nodes are in ready state. |
Before
|
After
|
Kirchhoff Laws Solution of circuit through a system of fundamental KCL/KVL equations based on a randomly-generated fundamental tree. Only the equations that are strictly necessary to compute the required output variables are formulated and solved. The last node could be both ready (if the solution is part of a more complex method, i.e. superposition) or completed (if the solution is the objective of the exercise). |
Before
|
After
|
Generalized series of resistances/impedances As series reduction, but applied to identify and simplify groups of resistances or impedances connected pairwise in cutsets (generalized series). |
Before
|
After
|
Generalized series of voltage sources As source reduction of voltage sources connected in series, but applied to identify and simplify groups of voltage sources connected pairwise in cutsets (generalized series). |
Before
|
After
|
Source reduction Circuit simplification by identification of groups of series-connected voltage sources and/or parallel-connected current sources, and replacement with suitable equivalents. |
Before
|
After
|
Substitution Theorem applied to single sources Substitution theorem is applied to remove all elements that are connected in parallel to voltage sources or in series with current sources. |
Before
|
After
|
Simplified Nodal Analysis Simplified Nodal Analysis writes a minimal number of KCL at circuit nodes or supernodes, by eliminating unknowns that are not strictly necessary (voltages at nodes connected by voltage sources, and currents through voltage sources). |
Before
|
After
|
Simplify by removing short/open circuits This method simplifies the circuit graph by collapsing nodes connected by short circuits and removing open circuits. This method is useful in combination with superposition (which switches off sources leaving open/short circuits), transients with switches and piecewise constant sources including the Heaviside step function. This method should be given highest priority and should be applied whenever there is a short or open-circuit that can be eliminated. |
Before
|
After
|
Simplify by pruning connected subgraphs This method simplifies the circuit graph by detecting the biconnected subgraphs that do not include output variables and that are not coupled through element characteristics to circuit parts that include output variables. This method is useful in combination with superposition (which switches off sources leaving open/short circuits), transients with switches and piecewise constant sources including the Heaviside step function. This method should be given highest priority and should be applied whenever there is a short or open-circuit that can be eliminated. In fact, due to its advanced nature, this method is applied automatically as a post-processing without user interaction. |
Before
|
After
|
Thevenin equivalent: two-step Evaluation of Thevenin equivalent by computing separately the equivalent resistance and the open-circuit voltage. Two dedicated circuits are prepared, whose solution is undefined until in the last step the results are collected and the equivalent is constructed. |
Before
|
After
|
Thevenin equivalent: one-step Evaluation of Thevenin equivalent by excitation through external current source. This method only constructs the basic circuit that includes the original one-port plus an externally-connected current source. The new active circuit will have to be solved for the voltage across the current source. The last (future) solution step will extract \(R_{eq}\) and \(V_{eq}\) from the solution. |
Before
|
After
|
Norton equivalent: two-step Evaluation of Norton equivalent by computing separately the equivalent conductance and the short-circuit current. Two dedicated circuits are prepared, whose solution is undefined until in the last step the results are collected and the equivalent is presented. |
Before
|
After
|
Norton equivalent: one-step Evaluation of Norton equivalent by excitation through external voltage source. This method only constructs the basic circuit that includes the original one-port plus an externally-connected voltage source. The new active circuit will have to be solved for the current through the voltage source. The last (future) solution step will extract \(G_{eq}\) and \(I_{eq}\) from the solution. |
Before
|
After
|
Assemble Thevenin equivalent: two-step This method combines partial results obtained in the two-step evaluation of Thevenin equivalent and assembles the Thevenin equivalent. This template only exists in combination with the other template, "Thevenin equivalent: two-step". It is activated when all contributions are available, i.e. when the corresponding nodes are in ready state. |
Before
|
After
|
Assemble Norton equivalent: two-step This method combines partial results obtained in the two-step evaluation of Norton equivalent and assembles the Norton equivalent. This template only exists in combination with the other template, "Norton equivalent: two-step". It is activated when all contributions are available, i.e. when the corresponding nodes are in ready state. |
Before
|
After
|
Assemble Thevenin/Norton equivalent: one-step This method processes the symbolic solution obtained by the methods "Thevenin equivalent: one-step" or "Norton equivalent: one step", available as the characteristic of a one-port element, and assembles the corresponding Thevenin or Norton equivalent circuit. This method handles also the particular case of evaluation of \(R_{eq}\) or \(G_{eq}\) for a homogeneous one-port, resulting e.g. from application of methods "Equivalent resistance/conductance (using definition)". |
Before
|
After
|
Single-loop circuit solution For single-loop circuits, the solution is obtained directly through a simple formula, provided that only basic elements are present. |
Before
|
After
|
Two-node circuit solution For two-node circuits, the solution is obtained directly through a simple formula, provided that only basic elements are present. |
Before
|
After
|
Millman's theorem For circuits with Millman topology, the solution is obtained directly through a simple formula. |
Before
|
After
|
Equivalent resistance (using definition) Evaluation of equivalent resistance or impedance by excitation through external current source. This method only constructs the basic circuit that includes the original one-port plus an externally-connected current source. The new active circuit will have to be solved for the voltage across the current source. The last (future) solution step will evaluate the equivalent resistance/impedance by dividing the computed voltage by the external current source. The last operation is a particular case of method "Assemble Thevenin/Norton equivalent: one-step", which is here applied with a simplified characteristic having only the homogeneous contribution. |
Before
|
After
|
Equivalent conductance (using definition) Evaluation of equivalent conductance or admittance by excitation through external voltage source. This method only constructs the basic circuit that includes the original one-port plus an externally-connected voltage source. The new active circuit will have to be solved for the current through the voltage source. The last (future) solution step will evaluate the equivalent conductance/admittance by dividing the computed current by the external voltage source. The last operation is a particular case of method "Assemble Thevenin/Norton equivalent: one-step", which is here applied with a simplified characteristic having only the homogeneous contribution. |
Before
|
After
|
Voltage divider Basic voltage divider applied to single-loop circuit with voltage sources and resistances/impedances. |
Before
|
After
|
Current divider Basic current divider applied to two-node circuit with current sources and resistances/impedances. |
Before
|
After
|
Basic Thevenin to Norton conversion Basic conversion of Thevenin to Norton topology. This method involves identifying elementary two-element sources in Thevenin configuration, highlighting them in the circuit, providing the conversion to Norton form in a new circuit. This is only performed if this operation is detected to be useful, i.e., if the resulting circuit can be simplified by further operations (series/parallel of resistances/impedances/sources). |
Before
|
After
|
Basic Norton to Thevenin conversion Basic conversion of Norton to Thevenin topology. This method involves identifying elementary two-element sources in Norton configuration, highlighting them in the circuit, providing the conversion to Thevenin form in a new circuit. This is only performed if this operation is detected to be useful, i.e., if the resulting circuit can be simplified by further operations (series/parallel of resistances/impedances/sources). |
Before
|
After
|
Circuit reduction Circuit reduction via Thevenin/Norton application: identify well-defined subgraph with two interface nodes, find the corresponding Thevenin/Norton equivalent, and replace in original circuit. The replacement step that is scheduled is performed by method "Substitute Subgraph". |
Before
|
After
|
Substitute subgraph This method starts with an original circuit that includes a set of disjoint subgraphs to be replaced, and a corresponding set of replacement subgraphs (number of interface nodes must match in source and target subgraphs, of course). A new circuit is generated where each subgraph is replaced. |
Before
|
After
|
Modified Nodal Analysis (both as a formulation and as a solver) Formulate Modified Nodal Analysis equations. The Modified Nodal Analysis method works as a solver and produces as output the values of the target variables to be computed, just as Kirchhoff Laws or Simplified Nodal Analysis. The methods MNA Formulation and MNA DC Formulation provide only the MNA matrices as output, in full DAE form or in DC form, respectively. |
Before
|
After
|
State equations Formulate the state equations of a dynamic circuit (regular, non-degenerate). Replace dynamic elements with independent sources corresponding to state variables, and compute the dual variables. State equations are obtained by eliminating the dual variables using the characteristics of dynamic elements. |
Before
|
After
|
Assemble state equations This method starts with a cardinal two-port characterization induced by extracted state variables (dual variables expressed in terms of state variables), together with a specification of the characteristics of the dynamic elements. The result are the state equations of the circuit. This method must follow the method "State Equations", of which it represents a sub-template. |
Before
|
After
|
Two-port representation: elementwise Find any cardinal representation of a two-port element by computing matrix elements separately. The collection of individual elements is performed through method "Assemble two-port matrix". |
Before
|
After
|
Assemble two-port matrix: two-step Collect partial results corresponding to individual matrix elements and collect them in the desired two-port matrix. In case of transmission matrix, the partial results are assumed to be reciprocal (see method "Transmission matrix: elementwise"). |
Before
|
After
|
Two-port representation: one-step Find any cardinal representation of a two-port element by computing all matrix elements at the same time. The two ports are excited by external sources, and the corresponding dual variables are computed. The results are finally collected to construct the desired two-port matrix using method "Assemble two-port representation: one step". |
Before
|
After
|
Assemble two-port representation: one-step This method assembles any two-port matrix starting from the symbolic expression that provides the output variables in terms of the input variables. |
Before
|
After
|
Transmission matrix: elementwise Find the T matrix of a two-port by computing one matrix element at the time. Instead of computing \(A\), \(B\) ,\(C\), \(D\) evaluate their reciprocals \(1/A\), \(1/B\), \(1/C\), \(1/D\) by constructing individual circuits for which the latter are well-defined transfer functions. Finally, collect results and build the \(T\) matrix using method "Assemble two-port representation: two-step". |
Before
|
After
|
Transmission matrix: one-step Find the T matrix of a two-port by iterative application of KCL and KVL starting from the output nodes. The solution method implies that \(V_2\) and \(I_2\) are known port variables at port (2). This is accomplished by connecting a nullator with a shunt current source \(I_2\), and then connecting in series a voltage source \(V_2\) at the port (2). All this will have to be visualized graphically in a simpler way, by defining e.g. a new component whose voltage and current are known, visualized as a port (no element) but with voltage/current highlighted. On port (1), the dependent port, a norator is connected, which will be achieved through another new component with no symbol, and also with voltage and current suitably highlighted. The latter \(V_1\) and \(I_1\) will be the output variables of interest. The matrix \(T\) is assembled using method "Assemble two-port matrix: one-step". |
Before
|
After
|
Natural frequencies Find the natural frequencies (poles) of a LTI circuit. These are obtained as the zeros of the determinant of the MNA matrix written in the symbolic Laplace domain, after switching off all sources and setting to zero all initial conditions. |
Before
|
After
|
Steady-state analysis Find the steady-state solution of a circuit including only DC or AC sources, possibly with multiple frequencies. Superposition is applied by collecting groups of sources with the same frequency (including DC as a particular case). Each individual circuit is solved independently, and finally all results are collected by applying superposition, using method "Superposition (collect)". |
Before
|
After
|
DC Steady-state analysis Find the DC steady-state solution of a generic LTI circuit with DC sources only. This method constructs the DC steady-state circuit by setting all switches and sources to their configuration for \(t>0\), all dynamic elements to open (capacitors) or short (inductors), and sets the problem statement to DC solve. |
Before
|
After
|
AC Steady-state analysis Find the AC steady-state solution of a generic LTI circuit with AC sources only (same frequency). First step is to apply method "Convert to Phasor (AC) symbolic circuit", and to set up the problem statement to AC solve. After solution, conversion from phasor to sinusoid is performed by applying method "convert Phasor to sinusoid". |
Before
|
After
|
AC Power Find the AC power absorbed/delivered by given elements. Phasor circuit is first derived, by setting problem statement to AC solve for relevant voltages and currents. Once computed, the method "Evaluate AC power" is applied to process voltages and currents and derive active/reactive powers. |
Before
|
After
|
Convert to Phasor (AC) symbolic circuit Convert a generic LTI circuit with AC sources at the same frequency to the corresponding symbolic phasor circuit. |
Before
|
After
|
Convert from Phasor to sinusoid Convert phasor voltages or currents to time-domain sinusoids. |
Before
|
After
|
Evaluate AC power Process phasor voltages and/or currents to evaluate active and reactive power absorbed/delivered by desired elements. |
Before
|
After
|
Convert to Laplace-domain symbolic circuit Convert a generic LTI circuit with arbitrary sources to the corresponding Laplace-domain symbolic circuit. Initial conditions are computed first, and used to construct the Laplace-domain circuit. The latter is constructed using method "Assemble Laplace-domain symbolic circuit". |
Before
|
After
|
Assemble Laplace-domain symbolic circuit This method constructs the Laplace-domain symbolic circuit starting from the original circuit in the time-domain and knowledge of the initial conditions for the states at \(t=0-\). |
Before
|
After
|
Initial conditions (t=0-) Consider a generic LTI circuit with arbitrary sources that operate at steady-state for \(t<0\), and evaluate the initial conditions on the state variables at \(t=0-\). First, derive a steady-state circuit that operates until \(t=0-\). Solve this circuit for state variables. Finally, evaluate the resulting expressions for \(t=0-\). The last step is not necessary if only DC sources are present. No steps are necessary if no sources are active for \(t<0\). The evaluation at \(t=0-\) is performed by method "Evaluate symbolic expression". |
Before
|
After
|
Initial conditions (t=0+) Consider a generic LTI circuit with arbitrary sources that operate at steady-state for \(t<0\), and evaluate the initial conditions on arbitrary variables at \(t=0+\). First, derive a steady-state circuit that operates until \(t=0-\). Solve this circuit for state variables. Then, impose state continuity at \(t=0\), and solve the circuit at frozen time \(t=0+\) for the desired variables. The evaluation of the state variables at \(t=0-\) is performed using method "FindInitialConditions". |
Before
|
After
|
Evaluate symbolic expression This method processes a symbolic expression in a given variable \(x\) and a corresponding value \(x=x_*\). The result is the symbolic expression evaluated at \(x=x_*\). |
Before
|
After
|
Transfer function Find the transfer function between a given source and one or more outputs. First, the symbolic circuit is derived by activating a single source (whose value is redefined to be symbolic) and deactivating any initial condition. The symbolic circuit is solved for the desired output variables, and finally the transfer functions are retrieved by extracting the coefficients that multiply the source. |
Before
|
After
|
Extract transfer function This method processes the symbolic solution obtained by the method "Transfer function" and extracts the desired transfer function(s) by typesetting the results. |
Before
|
After
|
Impulse response Find the impulse response of one or more outputs due to a given source. First, the symbolic circuit is derived by activating a single source (whose value is redefined to be \(\delta(t)\)) and deactivating any initial condition. The symbolic circuit is solved for the desired output variables, and finally the inverse Laplace transform is applied to determine the impulse response(s). The latter operation is performed with method "Inverse Laplace transform". |
Before
|
After
|
General transients Find the transient solution of a general LTI circuit. Initial conditions are computed first, by setting up a steady-state circuit for \(t<0\), whose solution is undefined since the flow will depend on the type of sources that are present (see method for Initial conditions). Once initial conditions are known, the Laplace-domain symbolic circuit is constructed, solved for the desired (symbolic) output variables, and finally the inverse Laplace transform is computed to obtained the desired transient solutions. The latter operation is performed with method "Inverse Laplace transform". |
Before
|
After
|
Inverse Laplace transform Find the inverse Laplace transform of given rational function(s) \(H(s)\). |
Before
|
After
|
Bode diagrams Draw the (asymptotic) Bode diagram corresponding to a given transfer function. |